1. Field of the Invention
The present invention relates to a high-integration low-profile package.
2. Description of the Related Art
A semiconductor device such as an IC or LSI is packaged into a package to protect a semiconductor substrate (chip) having semiconductor elements thereon from contamination sources (e.g., dust, chemicals, gases, and humidity) and a mechanical impact. This package requires characteristics such as excellent hermetic sealing, high resistance to high temperatures during assembly, high mechanical strength, high chemical stability, excellent insulating properties, and excellent high-frequency characteristics.
The package is made of a resin material, a ceramic material, or the like. A resin package is exemplified by a DIP (Dual Inline Package) shown in FIG. 1.
This DIP will be described below.
A chip 10 is fixed on a chip mount portion 20 of a lead frame by a conductive adhesive 30. Semiconductor elements are formed in the chip 10. The chip 10 has electrode pads 60. The leads 40 are formed by part of the lead frame. One end of each bonding wire 70 is connected to a bonding portion 50 of one lead 40. The other end of the bonding wire 70 is connected to one electrode pad 60 of the chip 10. The bonding wires 70 are made of Al or Au. The chip 10, the chip mount portion 20, the bonding wires 70, and parts of the leads 40 are covered with a molding resin 80 by, e.g., a transfer mold method.
A ceramic package is exemplified by a package using a stacking method and a package using a pressure molding. The ceramic packages have an advantage in excellent hermetic sealing.
Recent packages incorporating chips are required to be compact, low-profile packages.
A memory card having a thickness of 3.3 mm, for example, must have a smaller thickness and a higher packing density in a near future. The chip size gradually increases along with the development of semiconductor devices having a higher packing density and a high integration density. Therefore, a conventional packaging method is difficult to cope with demands for compact, low-profile packages.
In the DIP shown in FIG. 1, when the thickness of the chip 10 is given to be about 0.35 mm, the minimum value of distance (i.e., the height of a semiconductor device) from the distal end (i.e., a contact portion with a circuit substrate) H of each lead 40 to the uppermost portion of the molding resin 80 which covers the chip 10 is about 1.25 mm. A thickness T of the semiconductor device is about 1.0 mm. A distance D from the chip 10 to the proximal end (i.e., a lead portion exposed from the molding resin 80) of each lead 40 is at least 1.0 mm. A length of a package is determined by adding the length of the chip 10 to a length which is twice distance D. The shortest distance from the edge of the chip 10 to each electrode pad 60 is about 0.2 mm.
It is difficult to obtain a compact, low-profile package due to the following reason.
Each bonding wire 70 which connects a bonding portion 50 of a lead 40 and a corresponding pad 60 of the chip 10 is curved having a large radius of curvature. This bonding wire 70 must be protected with the molding resin 80. In addition, the molding resin 80 must have a thickness enough to fix the leads 40. In this case, when the package size comes close to the chip size, the molding resin 80 cannot fix the leads 40, and the leads 40 may be removed from the package.